Basic processing unit.html (3208B)
1 <?xml version="1.0" encoding="UTF-8"?> 2 <!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> 3 <html><head><link rel="stylesheet" href="sitewide.css" /><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"/><meta name="exporter-version" content="Evernote Mac 6.13.1 (455785)"/><meta name="altitude" content="2.037073373794556"/><meta name="author" content="Alex Balgavy"/><meta name="created" content="2017-11-23 3:08:56 PM +0000"/><meta name="latitude" content="52.33301536382147"/><meta name="longitude" content="4.865530882137468"/><meta name="source" content="desktop.mac"/><meta name="updated" content="2017-11-30 2:10:04 PM +0000"/><title>Basic processing unit</title></head><body><div><span style="font-weight: bold;">Organisation and basic processing cycle</span></div><div>Execution of complete instruction:</div><div><ol><li>Fetch instruction</li><ul><li>fetch instruction pointed to by PC, put it into IR (instruction register)</li><li>increment PC by number of bytes</li><li>decode IR and execute instruction specified in IR</li></ul><li>Fetch operand</li><li>Perform operation</li><ul><li>use memory operand / NOP</li></ul><li>Store result</li></ol><div><br/></div></div><div><br/></div><div>Components:</div><div><ul><li>CPU bus in the middle — means of communication between different components</li><ul><li>connects every pair of components</li><li>bus width is based on the size of the word (bits), e.g. 32 or 64 depending on the ISA</li><li>bus can only transport that many bits max</li><li>every component can read at the same time</li><li>only one component can write at a certain time</li></ul><li>PC (program counter) — counts instructions, notes which is next</li><li>Processor-memory interface — registers</li><ul><li>Y register — internal, cannot be accessed</li><li>MAR (memory address register) — stores location of various data in memory</li><li>MDR (memory data register) — stores values (data) to be stored</li><li>IR (instruction register) — stores the next instruction</li></ul><li>Decoder — changes (decodes) an instruction into signals</li><li>Register file (R0, R1, R2,…)</li><ul><li>package multiple registers together</li><li>add single gates for input and output -> lower energy requirements</li><li>but with this, only one register can read/write the bus at a time.</li><li>so add another bus ¯\_(ツ)_/¯ energy requirement is the limit</li></ul><li>ALU — computes stuff</li></ul></div><div><br/></div><div>Register gating:</div><div><ul><li>controls who can access the bus</li><li>Put gates before each component to control input/output</li></ul><div><br/></div></div><div>Register transfer (e.g. R1 to R3 — all happens at once):</div><div><ol><li>Addr_out = R1</li><li>R_out</li><li>Addr_in=R3</li><li>R_in</li></ol><div><br/></div></div><div>Load from memory:</div><div><ol><li>Ri_out, MAR_in, read</li><li>MDR_inE, WMFC</li><li>MDR_out, Ri_in</li></ol><div><br/></div></div><div>Store to memory:</div><div><ol><li>Ri_out, MAR_in</li><li>Rj_out, MDR_in, write</li><li>MDR_outE, WMFC</li></ol></div><div><ol/></div><div><br/></div><div><br/></div></body></html>